Reduced Instruction Set Computer
<processor> (RISC) A
processor whose design is based on the rapid execution of a sequence of simple instructions rather than on the provision of a large variety of complex instructions (as in a
Complex Instruction Set Computer).
Features which are generally found in RISC designs are uniform instruction encoding (e.g. the op-code is always in the same bit positions in each instruction which is always one word long), which allows faster decoding; a homogenous
register set, allowing any register to be used in any context and simplifying
compiler design; and simple
addressing modes with more complex modes replaced by sequences of simple arithmetic instructions.
Examples of (more or less) RISC processors are the Berkeley RISC,
HP-PA,
Clipper, i960,
AMD 29000,
MIPS R2000 and
DEC Alpha.
IBM's first RISC computer was the RT/PC (
IBM 801), they now produce the RISC-based
RISC System/6000 and
SP/2 lines.
Despite Apple Computer's bogus claims for their
PowerPC-based
Macintoshes, the first RISC processor used in a
personal computer was the
Advanced RISC Machine (ARM) used in the Acorn {Archimedes}.
