Von Neumann architecture
<architecture, computability> A computer architecture conceived by mathematician John von Neumann, which forms the core of nearly every computer system in use today (regardless of size).
In contrast to a Turing machine, a von Neumann machine has a random-access memory (RAM) which means that each successive operation can read or write any memory location, independent of the location accessed by the previous operation.
A von Neumann machine also has a central processing unit (CPU) with one or more registers that hold data that are being operated on.
The CPU has a set of built-in operations (its instruction set) that is far richer than with the Turing machine, e.g. adding two binary integers, or branching to another part of a program if the binary integer in some register is equal to zero (conditional branch).
The CPU can interpret the contents of memory either as instructions or as data according to the fetch-execute cycle.
Von Neumann considered parallel computers but recognized the problems of construction and hence settled for a sequential system.
For this reason, parallel computers are sometimes referred to as non-von Neumann architectures.
A von Neumann machine can compute the same class of functions as a universal Turing machine.
[Reference?
Was von Neumann’s design, unlike Turing’s, originally intended for physical implementation?]
(http://www.salem.mass.edu/~tevans/VonNeuma.htm).
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